From 986e81c09eb5f164b15395e5839c79abd574f906 Mon Sep 17 00:00:00 2001 From: Adam Madsen Date: Wed, 11 Nov 2020 13:12:52 -0600 Subject: [PATCH] [amd] navi10: Fix PSP bootloader read at reset check --- dkms.conf | 2 +- src/amd/navi10.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/dkms.conf b/dkms.conf index 58d9bdb..129b981 100644 --- a/dkms.conf +++ b/dkms.conf @@ -1,5 +1,5 @@ PACKAGE_NAME="vendor-reset" -PACKAGE_VERSION="0.0.8" +PACKAGE_VERSION="0.0.9" BUILT_MODULE_NAME[0]="${PACKAGE_NAME}" MAKE[0]="make KDIR=${kernel_source_dir}" CLEAN="make KDIR=${kernel_source_dir} clean" diff --git a/src/amd/navi10.c b/src/amd/navi10.c index 061f57a..e700e33 100644 --- a/src/amd/navi10.c +++ b/src/amd/navi10.c @@ -120,7 +120,7 @@ static int amd_navi10_reset(struct vendor_reset_dev *dev) (smnMP1_FIRMWARE_FLAGS & 0xffffffff)) & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >> MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT; - psp_bl_ready = !!(RREG32(mmMP0_SMN_C2PMSG_35) & 0x80000000L); + psp_bl_ready = !!(RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35) & 0x80000000L); nv_info("SMU response reg: %x, sol reg: %x, mp1 intr enabled? %s, bl ready? %s\n", smu_resp, sol, mp1_intr ? "yes" : "no", psp_bl_ready ? "yes" : "no");