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[amd] navi10: Fix PSP bootloader read at reset check

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This commit is contained in:
Adam Madsen 2020-11-11 13:12:52 -06:00
parent adcf81eb94
commit 986e81c09e
2 changed files with 2 additions and 2 deletions
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2
dkms.conf
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@ -1,5 +1,5 @@
PACKAGE_NAME="vendor-reset" PACKAGE_NAME="vendor-reset"
PACKAGE_VERSION="0.0.8" PACKAGE_VERSION="0.0.9"
BUILT_MODULE_NAME[0]="${PACKAGE_NAME}" BUILT_MODULE_NAME[0]="${PACKAGE_NAME}"
MAKE[0]="make KDIR=${kernel_source_dir}" MAKE[0]="make KDIR=${kernel_source_dir}"
CLEAN="make KDIR=${kernel_source_dir} clean" CLEAN="make KDIR=${kernel_source_dir} clean"

2
src/amd/navi10.c
View File

@ -120,7 +120,7 @@ static int amd_navi10_reset(struct vendor_reset_dev *dev)
(smnMP1_FIRMWARE_FLAGS & 0xffffffff)) & (smnMP1_FIRMWARE_FLAGS & 0xffffffff)) &
MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >> MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >>
MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT; MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT;
psp_bl_ready = !!(RREG32(mmMP0_SMN_C2PMSG_35) & 0x80000000L); psp_bl_ready = !!(RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35) & 0x80000000L);
nv_info("SMU response reg: %x, sol reg: %x, mp1 intr enabled? %s, bl ready? %s\n", nv_info("SMU response reg: %x, sol reg: %x, mp1 intr enabled? %s, bl ready? %s\n",
smu_resp, sol, mp1_intr ? "yes" : "no", smu_resp, sol, mp1_intr ? "yes" : "no",
psp_bl_ready ? "yes" : "no"); psp_bl_ready ? "yes" : "no");